Building A Custom Zynq-7000 SoC Development Board From The Ground Up

I have a new post on Hackaday: Building A Custom Zynq-7000 SoC Development Board From The Ground Up.

The presenter starts by designing the power system, then makes progress on power, improves the schematic, integrates DDR RAM, adds USB PHY, Ethernet PHY, and SD card, starts on HDMI, makes progress on layout, makes progress on routing, continues with routing, configures with Vivado and estimates costs, receives PCBs and components, starts the PCB assembly, adds power rail components, adds core components, connects power and does initial programming, makes an LED blink, gets the ARM APU working, troubleshoots FT2232H to JTAG, resolves FT2232H to JTAG issue, adds UART and DDR, gets HDMI working, installs PetaLinux, and at long last configures USB and Ethernet in PetaLinux.

See AMD Zynq 7000 SoCs for specs from AMD. The executive summary is that this SoC includes an ARM Cortex-A9 Based APU and an Artix-7 FPGA (or a Kintex-7 FPGA on higher models). We suppose this is an opportune time to mention that in case you missed it Xilinx was recently acquired by AMD which is why you see the AMD branding now.

Summarizing references from these videos, other videos include What your Differential Pairs Wish You Knew and How to Achieve Proper Grounding by [Rick Hartley]; books referenced include Printed Circuits Handbook 7ed and Signal and Power Integrity Simplified 3ed; courses referenced include Mixed-Signal Hardware Design with KiCad and Advanced Digital Hardware Design from [Philip Salmony]; and software used includes EasyEDA, Vivado, Vitis IDE, and Tera Term.

BeagleV-Fire RISC-V and FPGA

Today on IRC the BeagleV-Fire was brought to my attention. This computer system sports an FPGA and looks like just the thing to get as an entry-level system to learn about FPGA tech. These things seem to be hard to find at the moment but apparently they sell for around US$150 which is quite affordable for an entry-level system. And the manufacturer’s commitment to open hardware is encouraging. Click-through on the link to find a heap of developer resources.

Complex Programmable Logic Device

ChatGPT explains a Complex Programmable Logic Device (CPLD):

A CPLD (Complex Programmable Logic Device) is a type of digital integrated circuit that is used for creating custom digital logic designs. It’s a step between simple PLDs (Programmable Logic Devices) and more complex FPGAs (Field-Programmable Gate Arrays).

Click through for further details.

Critical Path != Critical Section

I always get the concepts “critical path” and “critical section” confused.

The “critical section” is the part in your algorithm which you must hold a lock for; whereas the “critical path” is an idea from hardware design which relates to the time taken for the longest combinatorial logic that needs to be processed during a clock cycle, thus limiting the frequency you can run your clock at.

Although the terminology “critical path” came from hardware, the same terminology is used in software. ChatGPT has a fairly good write-up on the two uses of the term “critical path”.

I learned a little more about this in Introduction to VHDL for FPGA and ASIC design.